As is known, there is trend toward miniaturization of electronic products such as mobile phones, tablets, digital cameras, and the like. There is also a demand for development of electronic products which have an increased number of functionalities and have increased electronic capabilities (e.g., increased speed, memory, and operational life). These trends have resulted in a demand for integrated circuits which enable these and other increased capabilities (e.g., increased density, computing power and extended operational life). As is known, integrated circuits may be fabricated using a variety of technologies, including complementary metal-oxide-semiconductor (CMOS) technology.
As CMOS technology reaches the end of Moore's Law scaling and power consumption of integrated circuits fabricated using such technology continues to increase, there is a need to develop “beyond-CMOS” device technologies (e.g., to achieve high-performance exascale computing). As is known, CMOS technology may be used in fabricating processors, for example, and processors are often constructed on a chip using integrated circuit techniques. As is also known, CMOS processors are typically used logic elements in current high performance computing applications. As is additionally known, a significant amount of the power consumption of the CMOS processors is due to moving information between logic elements (e.g., CMOS processors) rather than actual logic operations performed by the processors.
As is known, superconducting technology and superconducting semiconductor structures (e.g., integrated circuits) fabricated using such technology are a leading candidate technology for high performance computing applications (e.g., due to the energy efficiency of superconducting technology). Although many studies have been conducted on superconducting semiconductor structures and their use in high performance computing applications, a major technical challenge is integrating the superconducting semiconductor structures and other components of high performance computing circuits into a cryogenic chamber. This is typically due to the large number of individual chips and associated hardware often required to build high performance computing circuits, and limited cryogenic space of the cryogenic chamber used to cool or refrigerate the circuits.